About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X .
The Staff Digital Design Engineer owns digital design execution from specification through physical implementation. The role emphasizes RTL development, synthesis, timing closure, DFT collaboration, and close partnership with physical design teams to deliver robust, production‑ready designs. This role involves close collaboration with global design teams across multiple time zones to support semiconductor process development alongside the teams building ADI's next-generation technologies.
- Lead RTL digital design for complex blocks and subsystems
- Execute full digital design flow including synthesis and static timing analysis
- Collaborate with DFT teams to integrate scan and test features
- Support place‑and‑route activities including timing closure and ECO implementation
- Partner with physical design teams to resolve layout‑dependent timing and power issues
- Participate in design reviews and contribute to methodology improvements
- Document design specifications and implementation results
- M.S. or Ph.D. degree in Microelectronics, Electrical Engineering, or related fields.
- 5+ years of experience in digital IC / SoC design, with demonstrated ownership of complex IPs or full-chip designs.
- Strong expertise in digital circuit design and RTL development (Verilog/SystemVerilog)
- Solid understanding of digital design flows: synthesis, STA, and physical implementation
- Experience with synthesis using Cadence Genus
- Experience with place‑and‑route (physical layout design) using Cadence Innovus
- Working knowledge of DFT concepts and implementation tradeoffs
- Fluent in Mandarin; strong English written and verbal communication skills for cross-site collaboration
- Ability to collaborate effectively across global, cross‑functional teams
- Experience with complex SoC or mixed‑signal designs
- Familiarity with industry‑standard digital interfaces
- Exposure to advanced CMOS process technologies
- Experience mentoring junior engineers or leading technical initiatives
- Block‑ and subsystem‑level digital ownership with physical‑aware design decisions
- Timing constraint definition and management
- Active involvement in timing closure and late‑stage optimization
- Work closely with global design teams across multiple time zones
- Contribute to coding standards, design flows, and best practices
- Influence product quality and execution predictability on high‑impact programs
At Analog Devices, you will work on meaningful engineering problems with real‑world impact alongside world‑class engineers. ADI fosters a culture of technical excellence, continuous learning, and collaboration, providing opportunities to grow while contributing to technologies that shape the future of the intelligent edge.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days