位于北京市的 18 个优质test engineer职位（正在招聘！）

Lead Software Engineer - AI/LLM for Virtuoso
Cadence Design Systems —北京市
- 全职
MBOS System Integration Process & Outsourcing Strategy
Mercedes-Benz Group AG —北京市
AI Platform Architect
Grab —北京市
快速申请
Drive Systems Electric Vehicle Range Assist Engineer
Mercedes-Benz Group AG —北京市
Technical Program Manager
HERE Technologies —北京市
Vehicle EE Diagnosis
Mercedes-Benz Group AG —北京市
Lead Software Engineer for Virtuoso ADE
Cadence Design Systems —北京市
- 全职
AI Infrastructure Networking Engineer
Lenovo —北京市
5天
R&D Engineer 4, Software
Keysight Technologies, Inc. —北京市
Sales Engineer
Teledyne Technologies Inc. —北京市
- 全职
Product Design/Development-Research Specialist
Procter & Gamble —北京市
- 全职
Senior Manager, Supplier Capacity Management
Mercedes-Benz Group AG —北京市
Sr Application Engineer- Automotive MCU
Renesas Electronics —北京市
快速申请
Digital Design Manager
Analog Devices —北京市海淀区
- 全职
11天
Software Architect
Yokogawa —北京市
- 全职
1天
Control Electronics Engineer
ABB Beijing Drive Systems Co. Ltd. —北京市
快速申请
10天
Product Compliance Engineer
ABB Beijing Drive Systems Co. Ltd. —北京市
快速申请
10天
Senior Staff/Staff Machine Learning Engineer
Coupang —北京市
快速申请

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MBOS System Integration Process & Outsourcing Strategy
Mercedes-Benz Group AG —北京市
OS system integration outsourcing strategy and process. OS system integration outsourcing strategy: OS system integration outsourcing strategy to match and…

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Lead Software Engineer - AI/LLM for Virtuoso

Cadence Design Systems -
北京市

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职位详情

全职

完整职位描述

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems is the leading provider of design automation tools for electronic and intelligent systems design. Virtuoso Development Engineer is responsible for designing, implementing, and maintaining software used in virtuoso platform in the epoch of emerging Agentic AI frameworks. Engineer will be part of a team focused on modernizing integrated circuit designing, simulation, and optimization tools to integrate into emerging Agentic AI frameworks in the broader electronic design automation context.

Responsibilities

Design and implement new software features and interfaces in the Cadence Virtuoso platform.
Contribute to continuous integration, unit testing, and code quality processes using modern C++ paradigms and AI-assisted development workflows.
Collaborate with cross-functional engineering teams across time zones (US, China, EU, UK, and India) to deliver production-quality simulation technologies.

Required Qualifications

MS/PhD in Computer Science/Computer Engineering.
Strong software engineering fundamentals, including design, refactoring, debugging, and testing of complex applications. Candidate should be familiar with test-driven development and design of componentized, modular software using minimalist design principles. Candidate should have demonstrated history of both new software development and ability to refactor existing code bases.
Proficient in Python, C++.
Proficient in English (written and verbal) for cross-site collaboration.
Candidate need to have the necessary computer science background to be able to design and deploy production software systems that make use of ML/LLM technology. You will not be developing new ML models themselves, but innovating to use AI technology in an EDA software framework and pushing the boundaries of Agentic AI within those frameworks.
Desire to develop and deploy next-generation production EDA tools that have real-world impact on productivity of integrated circuit designers.

Skills of Interest

Software quality practices: Experience with unit testing, code review processes.
AI-assisted development workflows: Ability to integrate AI tools into engineering workflows to enhance productivity and code quality.
Machine Learning Engineering: Basic background in machine learning, data pipelines, predictive modeling, and deployment. Practical knowledge of frontier LLMs (e.g., DeepSeek, Qwen, GPT/Claude families) and how choices affect latency, cost, and reliability.
Agent architecture: Familiarity with concepts such as ReAct (reason-act loops), planning/evaluation/self-correction, and persistent memory design; frameworks (e.g., LangChain, Dify, Coze); MCP (Model Context Protocol), function/tool calling, and structured outputs.
Data and retrieval: Understanding of RAG, retrieval pipelines, embeddings, chunking, and grounding.

Context engineering: Designing structured context to produce consistent, predictable outputs despite changing LLM behavior.
Regulatory awareness: Familiarity with China's AI governance framework and data privacy regulations (PIPL) is a plus.
Familiarity with electronic design automation tools used for design of analog circuits is preferred.

We’re doing work that matters. Help us solve what others can’t.

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在北京市的test engineer个职位

Lead Software Engineer - AI/LLM for Virtuoso

MBOS System Integration Process & Outsourcing Strategy

AI Platform Architect

Drive Systems Electric Vehicle Range Assist Engineer

Technical Program Manager

Vehicle EE Diagnosis

Lead Software Engineer for Virtuoso ADE

AI Infrastructure Networking Engineer

R&D Engineer 4, Software

Sales Engineer

Product Design/Development-Research Specialist

Senior Manager, Supplier Capacity Management

Sr Application Engineer- Automotive MCU

Digital Design Manager

Software Architect

Control Electronics Engineer

Product Compliance Engineer

Senior Staff/Staff Machine Learning Engineer

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We’re doing work that matters. Help us solve what others can’t.

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