BSEE degree with 2+ years of applicable experience in analog/custom layout of advanced technology nodes
Proficient with Layout edit/verify tools, like Virtuoso XL, Pegasus/Calibre DRC/LVS, etc.
Proficient with EMIR tools, like Voltus-FI
Hands-on experience conducting DRC/LVS/ERC analysis, EMIR analysis, and recommending appropriate solutions
Fundamental understanding of IC design technology and process/methodology
Essential that the individual demonstrates good teamwork and self-motivation
Good communication skills in English
Work experience in PERC run is a plus
Work experience in FinFET layout is a plus
Work experience in ESD/Latch-up is a plus
Work experience in cooperation with digital P&R team is a plus