LOCATION: Chengdu
REQUIREMENTS: BS or above, MS preferred, with major in Microelectronics or Electronic and Information Engineering preferable. Candidate should have at least 3 years analog layout experience, plus be familiar with the CMOS process and have sound knowledge of the physical behavior of Diode, MOSFET and Bipolar devices; be self-motivated with the ability to work independently, within a team and under pressure; and have sound speaking and writing English language skills. The ideal candidate can take responsibility for analog or mixed signal IC layout; managing all levels of the analog mask layout, ESD pad placement, block level layout up to top level integration and tape out; completing the custom layout of analog blocks; and working with the design engineer to understand layout requirements to ensure the highest quality product.
EMAIL: [email protected]
